The lack of mass-produced 8-inch (200mm) Semi-Insulating (SI) SiC substrates is due to a combination of stricter technical requirements, more complex material challenges, and lower immediate market demand compared to the Conductive (N-type) SiC wafers used in the booming Electric Vehicle (EV) market.

1. Differentiated Applications Drive Priorities

The fundamental difference lies in what each wafer type is used for, which dictates the industry's focus and investment:

Wafer TypePrimary ApplicationKey RequirementCurrent Status (8-inch)Conductive (N-type)Power Electronics (EV Inverters, Solar, UPS)Low On-Resistance and High VoltageApproaching Mass ProductionSemi-Insulating (SI)Radio Frequency (RF) Devices (GaN-on-SiC for 5G/Radar)Extremely High Resistivity and Low LossMostly R&D/Laboratory Stage

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The enormous, rapidly growing demand from the automotive sector for N-type SiC has directed the majority of capital and research efforts toward resolving the challenges for that wafer type first.

2. Higher Technical Hurdles for SI-SiC

Achieving a high-quality, large-diameter SI substrate is significantly more difficult than achieving a conductive one, primarily due to the method used to make it insulating.

A. The Challenge of Doping Uniformity

To make SiC semi-insulating, manufacturers introduce a compensating dopant—most commonly Vanadium (V)—that "traps" the free carriers, thus raising the resistivity to very high levels (>105Ω⋅cm).

• Non-Uniformity: Uniformly distributing this compensating dopant across a large, 8-inch crystal is extremely challenging. Any variation in the V concentration creates resistivity fluctuations across the wafer.
• RF Performance: For RF devices, these resistivity fluctuations are a killer defect, as they can lead to increased parasitic capacitance, higher signal losses, and degraded high-frequency performance.

B. Increased Crystal Stress and Defects

Crystal growth is already complex, but it's exacerbated for SI material:

• Thermal Stress: The addition of the compensating dopant can alter the crystal's physical properties, leading to greater internal thermal stress during the growth process. This stress makes the larger 8-inch crystal more susceptible to cracks or significant warpage.
• Stricter Defect Control: RF devices built on SI-SiC typically demand a much lower defect density (like micropipes and dislocations) than power devices, as high-frequency signals are highly sensitive to these imperfections, making the growth specification much harder to meet for large diameters.

3. Market Risk and Investment Priorities

The business case for 8-inch SI-SiC is not as compelling in the near term as it is for N-type:

• Smaller Market: The primary SI-SiC application is for GaN-on-SiC RF devices (for 5G base stations, radar). While important, this market is currently significantly smaller than the EV-driven power market.
• Sufficient 6-inch Supply: Most current RF applications are satisfied with the performance and volume provided by 6-inch SI-SiC wafers. This reduces the immediate urgency for manufacturers to make the massive capital investment required for 8-inch SI equipment and R&D.

In essence, the industry is focusing its scaling efforts and resources on the largest, most profitable opportunity (8-inch N-type SiC for EVs) before tackling the more technically difficult and smaller SI market.

For a more detailed breakdown of the technical and strategic reasons why 8-inch semi-insulating substrates are lagging, you can read the full article: JXT Wafer Blog Post (https://jxtwafer.com/about/blogs/1285.html).